This contest is closed.
Patexia seeks prior art for US Patent 5,915,109 (US ‘109), with a focus on claim 15. The patent allegedly describes a microprocessor with an instruction set specifically designed for saturation operations.
This instruction set includes an ability where:
- each instruction is allowed to have an independent saturation value
- and the saturation value for each instruction is allowed to be completely different from the saturation values for other instruction in the same set
Saturation operations are computer operations where the results are limited to a fixed width, called the “saturation value.” US ‘109 describes this as typically occurring when an overflow has occurred as an operation result of an operation circuit, such as during video code processing based on MPEG2.
Typically, this saturation value is fixed for the entire architecture, making it difficult to perform any saturation operation for data having optional bit length in one instruction or for conventional microprocessors to provide convenient multimedia instructions capable of processing saturation operations at a high rate.
As such, Patexia seeks prior art that specifically describes:
- a saturation instruction operation, operating within an instruction set
- the saturation instruction operation allowing for multiple use cases (such as multimedia decoding) and not limited to saturating math instructions
- and the saturation instruction defining its own variable saturation value
Several of the known references (including US 5,448,509, US 5,684,728, US 5,508,951, and US 4,945,507, and US 5,559,973) were excluded specifically because they either:
- detail saturating math instructions, for example saturating to a variable value, but the value is based on the bit width of the operands and not on a field in the instruction
- or detail saturate instructions that saturate to a fixed value
|1||Is the reference a patent filed before August 12th, 1996, or a non-patent document filed before August 11th, 1995, and is the filing/publication date available on the face of the document?||T/F|
|2||Does the reference describe an instruction set which is executable on a processor?||10|
|3||Does the reference describe the instruction set containing at least one instruction utilized for saturation operations, which is not part of a math instruction?||20|
|4||Does the saturation instruction in the instruction set include a field to set a variable positive/negative saturation value specifically for that instruction?||40|
|5||Does the execution of the saturation operation in the instruction set involve receiving the target value from a register, carrying out the operation, and then saturating the result based on the saturation value for that specific instruction and storing the result?||30|
This is a Prior Art Search contest aimed at determining if a patent idea was known and publicly available before a patent was filed.
+5 bonus points will be awarded for non-patent literature and for foreign language references.
This contest will close on Sunday, November 16th, 2014 at 11:59 PM PST and is subject to modified prize distribution awards:
- the top submission will be designated as a winner and receive $3,000
- the next scored 2 submissions will be designated as winners and receive $500 each
- the next scored submissions (to a maximum of 10) will be designated as runners up and receive a minimum of $100 each
- All work must be original and prepared by a single author
- Maximum of one entry per person allowed
- Maximum length of 1,500 words
- Entries must be in English
- Ideas should be clearly expressed at a college-educated, non-expert level
- All submissions are subject to Patexia's contest legal terms
- Failure to follow these rules may lead to disqualification from the contest
- , A VLIW Processor for Multimedia Applications Holmann et al. Mitsubishi Electric Corporation System LSI Laboratory Submitted to HOT Chips 8 Symposium Stanford California Mar. 18 1996 pp. 1 3.
- , Accelerating Multimedia with Enhanced Microprocessors Lee IEEE Apr. 1995 pp. 22-31.
- , Japanese Publication with English Abstract Intel s MMX Speeds Multimedia Gwennap Microprocessor Report vol. 10 No. 3 Microdesign Resource Corp. Mar. 5 1996.
- , Mitsubishi Electric Corp. D30V Architecture Ver. 0.02 pp. 1 1 5 4.