MIT researchers present new method for improving the efficiency of hardware simulations of multicore chips
Researchers from the Massachusetts Intistute of Technology’s (MIT) Computer Science and Artificial Intelligence Laboratory (CSAIL) presented a new method for improving the efficiency of hardware simulations of multicore chips. Unlike competing methods, it guarantees that the simulator won’t go into “deadlock” -- a state in which cores get stuck waiting for each other to relinquish system resources, such as memory. The method should also make it easier for designers to develop simulations and for outside observers to understand what those simulations are intended to do. Another advantage of their system, the CSAIL researchers argue, is that it makes it easier for outside observers and for chip designers themselves to understand what a simulation is intended to do.