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Patexia Research
Issue Date Dec 23, 2021
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Patent Application - PREPARATION OF SOLDER BUMP FOR COMPATIBILITY WITH PRINTED ELECTRONICS AND ENHANCED VIA RELIABILITY > Claims

  • 1. A circuit comprising: a first sheet of dielectric material including a first top surface having at least one first conductive trace;a second sheet of dielectric material including a second top surface having at least one second conductive trace, the second sheet of dielectric material being bonded to the first sheet of dielectric material with bonding film;a first solder bump provided on the at least one first conductive trace; anda conductive material configured to connect the first solder bump on the at least one first conductive trace to the at least one second conductive trace.
    • 2. The circuit of claim 1, further comprising a second solder bump on the at least one second conductive trace.
      • 3. The circuit of claim 2, further comprising a ramp created by removing a portion of the second sheet of dielectric material between the first solder bump and the second solder bump.
        • 4. The circuit of claim 3, wherein the ramp is created by using a milling process to remove the portion.
      • 5. The circuit of claim 2, wherein a portion of at least one of the first solder bump and the second solder bump is removed to provide a clean surface for soldering.
        • 6. The circuit of claim 5, wherein the portion of the at least one of the first solder bump and the second solder bump is created by using a milling process to remove the portion.
      • 7. The circuit of claim 2, wherein the first solder bump is located between the first sheet of the dielectric material and the second sheet of dielectric material.
        • 8. The circuit of claim 7, wherein the second conductive trace includes a ground plane.
    • 9. The circuit of claim 1, wherein the first solder bump is located between the first sheet of the dielectric material and the second sheet of dielectric material, the circuit further comprising a through hole from the second sheet of dielectric material, the first solder bump and the first sheet of dielectric material.
      • 10. The circuit of claim 9, wherein the conductive material is applied to walls of the through hole.
        • 11. The circuit of claim 10, wherein the conductive material includes a solder ball, formed of solder paste material, disposed above the through hole, the solder ball being reflowed so that the solder paste material is drawn through the through hole.
          • 12. The circuit of claim 11, wherein the solder paste material is drawn through the through hole by a vacuum process to coat the walls of the through hole.
    • 13. The circuit of claim 1, wherein the first solder bump includes lead-based or lead-free solder.
    • 14. The circuit of claim 1, wherein bonding the first and second sheets of dielectric material to one another includes curing the sheets under pressure and temperature to form an integral final product.
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