Planarized semiconductor interconnect topography and method for polishing a metal layer to form interconnect | Patent Number 06232231

US 06232231 NA
Application Number9143723
Publication Number-
Pendency2 years, 8 months, 18 days
Filled DateAug 31, 1998
Priority DateAug 31, 1998
Publication Date-
Expiration DateAug 31, 2018
Inventor/Applicants Christopher A. Seams
Anantha R. Sethuraman
ExaminesLEE, HSIEN MING
Art Unit2823
Technology Center2800
Assignments
Invensas Corporation
Current
Tessera Xperi
Current
Phorus Inc.
Current
Tessera Advanced Technologies Inc.
Current
Ibiquity Digital Corporation
Current
Dts
Current
Cypress SemiconductorInfineon Technologies Ag
Original
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