Method of forming cross strapped Vss layout for full CMOS SRAM cell | Patent Number 06417032
US 06417032 B1Filled DateApr 11, 2000
Priority DateApr 11, 2000
Publication Date-
Expiration DateApr 11, 2020
Inventor/ApplicantsJhon-Jhy Liaw
ExaminesLE, BAU T
Art Unit2818
Technology Center2800
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