Modular interconnection architecture for an expandable multiprocessor machine, using a multilevel bus hierarchy and the same building block for all the levels | Patent Number 06996681
US 06996681 B1Filled DateApr 26, 2000
Priority DateApr 26, 2000
Publication Date-
Expiration DateApr 26, 2020
Inventor/ApplicantsJean-François Autechaud
ExaminesVERBRUGGE, KEVIN
Art Unit2189
Technology Center2100
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