Logic cell array and bus system | Patent Number 08471593

US 08471593 B2
Application Number13289296
Publication NumberUS 20120072699 A1
Pendency1 year, 7 months, 24 days
Filled DateNov 4, 2011
Priority DateOct 8, 2001
Publication DateMar 22, 2012
Expiration DateOct 8, 2021
Inventor/ApplicantsDirk Reichardt
Volker Baumgarte
Prashant Rao
Frank May
Armin Nückel
Gerd Ehlers
Frank Lier
Martin VORBACH
Martin Vorbach
Jens Oertel
ExaminesTAN, VIBOL
Art Unit2819
Technology Center2800
Assignments
Pact Xpp Schweiz Ag
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