Gate with self-aligned ledge for enhancement mode GaN transistors | Patent Number 10312335

US 10312335 B2
Application Number15655438
Publication NumberUS 20170317179 A1
Pendency1 year, 10 months, 19 days
Filled DateJul 20, 2017
Priority DateApr 8, 2009
Publication DateNov 2, 2017
Expiration DateApr 7, 2029
Inventor/ApplicantsAlexander Lidow
Alana Nakata
Jianjun Cao
ExaminesNIESZ, JAMIE C
Art Unit2822
Technology Center2800
Law Firm
You must be logged in to view
Login
Attorneys
Subscription-Only
View Concierge Program
Patent Prosecution report image

Empower your practice with Patexia Publication Prosecution IP Module.

Get access to our exclusive rankings and unlock powerful data.

Looking for a Publication Attorney?

Get in touch with our team or create your account to start exploring a network of over 120K attorneys.