Circuit and method for reducing power consumption in an instruction cache | Patent Number 06535959
US 06535959 B1Filled DateSep 5, 2000
Priority DateSep 5, 2000
Publication Date-
Expiration DateSep 5, 2020
Inventor/ApplicantsSameer I. Bidichandani
Sumant Ramprasad
Sumant Ramprasad
ExaminesGOSSAGE, GLENN
Art Unit2187
Technology Center2100
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