Concurrent measurement of critical dimension and overlay in semiconductor manufacturing | Patent Number 07080330
US 07080330 B1Filled DateMar 5, 2003
Priority DateMar 5, 2003
Publication Date-
Expiration DateMar 5, 2023
Inventor/ApplicantsCarmen Morales
Bhanwar Singh
Bharath Rangarajan
Bryan Choo
Bhanwar Singh
Bharath Rangarajan
Bryan Choo
ExaminesLIN, SUN J
Art Unit2825
Technology Center2800
Law Firm
You must be logged in to view
LoginAttorneys
Subscription-Only
View Concierge ProgramSee the invalidated claims, subscribe to our Concierge Program.
View Concierge ProgramEmpower your practice with Patexia Publication Prosecution IP Module.
Get access to our exclusive rankings and unlock powerful data.
Looking for a Publication Attorney?
Get in touch with our team or create your account to start exploring a
network of over 120K attorneys.