Clock-edge modulated serial link with DC-balance control | Patent Number 07627044

US 07627044 B2
Application Number11264303
Publication NumberUS 20070098112 A1
Pendency4 years, 1 month, 2 days
Filled DateOct 31, 2005
Priority DateOct 31, 2005
Publication DateMay 3, 2007
Expiration DateOct 30, 2025
Inventor/ApplicantsJaeha Kim
Min-Kyu Kim
Bong-Joon Lee
Won Jun Choe
Gyudong Kim
Deog-Kyoon Jeong
ExaminesAHN, SAM K
Art Unit2611
Technology Center2600
Assignments
Lattice Semiconductor
Current
Silicon ImageLattice Semiconductor
Original
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