Clock-edge modulated serial link with DC-balance control | Patent Publication Number 20070098112

US 20070098112 A1
Patent NumberUS 07627044 B2
Application Number11264303
Filled DateOct 31, 2005
Priority DateOct 31, 2005
Publication DateMay 3, 2007
Original AssigneeLattice Semiconductor
Current AssigneeLattice Semiconductor
Inventor/ApplicantsJaeha Kim
Bong-Joon Lee
Won Jun Choe
Gyudong Kim
Deog-Kyoon Jeong
Min-Kyu Kim
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