Memory having a dummy bitline for timing control | Patent Number 07746716
US 07746716 B2Filled DateFeb 22, 2007
Priority DateFeb 22, 2007
Publication DateAug 28, 2008
Expiration DateFeb 21, 2027
Inventor/ApplicantsGlenn E. Starnes
Lawrence F. Childs
Mark W. Jetton
Olga R. Lu
Lawrence F. Childs
Mark W. Jetton
Olga R. Lu
ExaminesPHAN, TRONG Q
Art Unit2827
Technology Center2800
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