Semiconductor device with linearly restricted gate level region including two transistors of first type and two transistors of second type with offset gate contacts | Patent Number 08258547

US 08258547 B2
Application Number12563076
Publication NumberUS 20100011328 A1
Pendency2 years, 11 months, 22 days
Filled DateSep 18, 2009
Priority DateMar 9, 2006
Publication DateJan 14, 2010
Expiration DateMar 8, 2026
Inventor/ApplicantsMichael C. Smayling
Scott T. Becker
ExaminesHOANG, QUOC DINH
Art Unit2892
Technology Center2800
Assignments
Avidbank Corporate Finance
Current
Tela Innovations Inc.Rpx Corporation
Original
Emerald Innovations
Original
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