Semiconductor device with linearly restricted gate level region including two transistors of first type and two transistors of second type with offset gate contacts | Patent Publication Number 20100011328
US 20100011328 A1Patent NumberUS 08258547 B2
Application Number12563076
Filled DateSep 18, 2009
Priority DateMar 9, 2006
Publication DateJan 14, 2010
Original AssigneeRpx Corporation
Emerald Innovations
Emerald Innovations
Current AssigneeAvidbank Corporate Finance
Inventor/ApplicantsMichael C. Smayling
Scott T. Becker
Scott T. Becker
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